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 VN808SR
Octal channel high side driver
Features
Type VN808SR

RDS(on) 150 m
Iout 0.7 A
VCC 45 V
VCC/2 compatible input Junction over-temperature protection Case over-temperature protection for thermal independence of the channels Current limitation Shorted load protection Undervoltage shut-down Protection against loss of ground Very low stand-by current Compliance to 61000-4-4 IEC test up to 4 kV
PowerSO-36
Description
The VN808SR is a monolithic device designed in STMicroelectronics VIPower M0-3 technology, intended for driving any kind of load with one side connected to ground. Figure 1. Block diagram
Active current limitation combined with thermal shutdown and automatic restart, protect the device against overload. In overload condition, the channel turns OFF and back ON automatically so as to maintain the junction temperature between TTSD and TR. If this condition makes the case temperature reach TCSD, the overloaded channel is turned OFF and restarts only when the case temperature has decreased to TCR (see waveform 3 Figure 7 on page 10). Non overloaded channels continue to operate normally. The device automatically turns OFF in the case of a ground pin disconnection. This device is especially suitable for industrial applications and conforms to IEC 61131.
July 2008
Rev 4
1/17
www.st.com 17
Contents
VN808SR
Contents
1 2 3 4 5 6 7 8 9 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Current, voltage conventions and internal diagram . . . . . . . . . . . . . . . 8 Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Reverse polarity protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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VN808SR
Maximum ratings
1
Maximum ratings
Table 1.
Symbol VCC -IGND IOUT -IOUT IIN VIN VESD PTOT LMAX TJ TC TSTG DC supply voltage DC ground pin reverse current TRAN ground pin reverse current (pulse duration < 1 ms) DC output current Reverse DC output current DC Input current Input voltage range Electrostatic discharge (R = 1.5 k; C = 100 pF) Power dissipation at Tc = 25 C Max inductive load (VCC = 24 V, RLOAD = 48 , TA = 100 C) Junction operating temperature Case operating temperature Storage temperature
Absolute maximum rating
Parameter Value 45 -250 -6 Internally limited -2 10 -3/+VCC 2000 96 2 Internally limited Internally limited -40 to 150 Unit V mA A A A mA V V W H C C C
Table 2.
Symbol RthJC RthJA
Thermal data
Parameter Thermal resistance junction-case Thermal resistance junction-ambient
(1)
Value Max Max 1.3 50
Unit C/W C/W
1. When mounted on FR4 printed circuit board with 0.5 cm2 of copper area (at least 35 m think) connected to all TAB pins.
3/17
Electrical characteristics
VN808SR
2
Electrical characteristics
(10.5 V < VCC < 32 V; -40 C < TJ < 125 C; unless otherwise specified) Table 3.
Symbol VCC VUSD RON
Power section
Parameter Operating supply voltage Undervoltage shutdown On state resistance IOUT = 0.5 A; TJ = 25 C IOUT = 0.5 A; OFF state; VCC = 24 V; TCASE = 25 C ON state (all channels ON); VCC = 24 V, TCASE = 100 C VCC = VSTAT = VIN = VGND = 24 V VOUT = 0 V VIN = VOUT = 0 V; Table 7. 0 1 Test conditions Min 10.5 7 150 Typ Max 45 10.5 185 280 150 12 Unit V V m m A mA
IS
Supply current
ILGND IL(off) td(Vccon)
Output current at turn-off OFF state output current Power-on delay time from VCC rising edge
1 5
mA A ms
Table 4.
Symbol tON tOFF
Switching (VCC = 24 V)
Parameter Turn-on time Turn-off time Test conditions RL = 48 from 80% VOUT Figure 5. RL = 48 to 10% VOUT Figure 5. RL = 48 from VOUT = 2.4 V to VOUT = 19.2 V Figure 5. RL = 48 from VOUT = 21.6 V to VOUT = 2.4 V Figure 5. Min Typ 50 75 0.7 1.5 Max 100 150 Unit s s V/s V/s
dVOUT/dt(on) Turn-on voltage slope
dVOUT/dt(off) Turn-off voltage slope
4/17
VN808SR
Electrical characteristics
Table 5.
Symbol VINL IINL VINH IINH VI(HYST) IIN
Input pin
Parameter Input low level Low level input current Input high level High level input current Input hysteresis voltage Input current VIN = VCC = 32 V VIN = VCC / 2 + 1 V VIN = VCC / 2 - 1 V 80 VCC /2+1 150 0.6 300 260 Test conditions Min Typ Max VCC /2-1 Unit V V V
Table 6.
Symbol TCSD TCR TCHYST TTSD TR THYST Ilim Vdemag
Protections
Parameter Case shut-down temperature Case reset temperature Case thermal hysteresis Junction shutdown temperature Junction reset temperature Junction thermal hysteresis DC Short circuit current VCC = 24 V; RLOAD = 10 m Test conditions Min 125 110 Typ 130 Max 135 Unit C C
7 150 135 7 0.7
15 175 200
C C C
15 1.7
C A V
Turn-off output clamp IOUT = 0.5 A; L = 6mH voltage
VCC-57 VCC-52 VCC-47
Table 7.
Symbol IHSTAT ILSTAT VCLSTAT
Status pin
Parameter High level output current Leakage current Clamp voltage Test conditions VCC = 18...32 V; RSTAT = 1 k (Fault condition) Normal operation; VCC = 32 V ISTAT = 1 mA ISTAT = -1 mA 6.0 6.8 -0.7 Min 2 Typ 3 Max 4 0.1 8.0 Unit mA A V V
5/17
Pin connections
VN808SR
3
Pin connections
Figure 2. Connection diagram (top view)
Table 8.
Pin N TAB 1 2,3,4,5 6 7 8 9 10 11 12 13
Pin functions
Symbol VCC VCC NC Input 1 Input 2 Input 3 Input 4 Input 5 Input 6 Input 7 Input 8 NC GND STATUS Output 8 Output 7 Function Positive power supply voltage Positive power supply voltage Not connected Input of channel 1 Input of channel 2 Input of channel 3 Input of channel 4 Input of channel 5 Input of channel 6 Input of channel 7 Input of channel 8 Not connected Logic ground Common open source diagnostic for over-temperature High-side output of channel 8 High-side output of channel 7
14,15,16,17,18 19 20 21,22 23,24
6/17
VN808SR Table 8.
Pin N 25,26 27.28 29,30 31,32 33,34 35,36
Pin connections Pin functions (continued)
Symbol Output 6 Output 5 Output 4 Output 3 Output 2 Output 1 Function High-side output of channel 6 High-side output of channel 5 High-side output of channel 4 High-side output of channel 3 High-side output of channel 2 High-side output of channel 1
7/17
Current, voltage conventions and internal diagram
VN808SR
4
Current, voltage conventions and internal diagram
Figure 3. Current and voltage conventions
Figure 4.
Equivalent internal block diagram (same structure for all channel)
Table 9.
Truth table
Conditions INPUTn L H L H L H L H OUTPUTn L H L X L L L L STATUS L L L L L H X X
Normal operation Current limitation Overtemperature (see waveforms 3, 4 Figure 7) -> TJ > TTSD Undervoltage
8/17
VN808SR
Switching time waveforms
5
Switching time waveforms
Figure 5. Turn-ON and turn-OFF
Figure 6.
VCC turn-ON
9/17
Switching time waveforms Figure 7. Waveforms
VN808SR
10/17
VN808SR Figure 7. Waveforms (continued)
Switching time waveforms
11/17
Reverse polarity protection
VN808SR
6
Reverse polarity protection
A schematic solution to protect the IC against a reverse polarity condition is proposed. This schematic is effective with any type of load connected to the outputs of the IC. The RGND resistor value can be selected according to the following conditions to be met: 1. 2. RGND 600 mV / (IS in ON state max). RGND (-VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can be found in the absolute maximum rating section of the device datasheet. The power dissipation associated to RGNG during reverse polarity condition is: PD = (-VCC)2/RGND This resistor can be shared by several different ICs. In such case IS value on formula (1) is the sum of the maximum ON-state currents of the different devices. Please note that if the microprocessor ground and the device ground are separated then the voltage drop across the RGND (given by IS in ON state max * RGND) produce a difference between the generated input level and the IC input signal level. This voltage drop will vary depending on how many devices are ON in the case of several high side switches sharing the same RGND. Figure 8. Reverse polarity protection
+ Vcc Statusi Inputi GND Outputi
RGND (Optional)
Load
12/17
VN808SR
Package mechanical data
7
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Table 10.
Dim. Min A a1 a2 a3 b c D (1) D1 E E1 (1) E2 E3 e e3 G H h L N S 0 0.80 0 15.50 5.8 0.65 11.05 0.10 15.90 1.10 1.10 10 8 0 0.031 0.000 0.610 0 0.22 0.23 15.80 9.40 13.90 10.90 0.10 Typ Max 3.60 0.30 3.30 0.10 0.38 0.32 16.00 9.80 14.50 11.10 2.90 6.2 0.228 0.025 0.435 0.0039 0.6260 0.0433 0.0433 10 8 0 0.008 0.009 0.622 0.370 0.547 0.429 0.003 Min Typ Max 0.1417 0.0118 0.1299 0.0039 0.0150 0.0126 0.6299 0.3858 0.5709 0.4370 0.1142 0.2441
PowerSO-36 mechanical data
mm inch
13/17
Package mechanical data Figure 9. PowerSO-36 drawings
VN808SR
14/17
VN808SR
Order codes
8
Order codes
Table 11. Order codes
Order codes VN808SR VN808SR13TR Package PowerSO-36 PowerSO-36 Packaging Tube Tape and reel
15/17
Revision history
VN808SR
9
Revision history
Table 12.
Date 13-Sep-2005 01-Mar-2007 26-Mar-2007 07-Jul-2008
Document revision history
Revision 1 2 3 4 Initial release Document reformatted Typo in Figure 3. Added Section 4 on page 8 Changes
16/17
VN808SR
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